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NXP Semiconductors /LPC408x_7x /SDMMC /COMMAND

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Interpret as COMMAND

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CmdIndex0 (Response)Response 0 (LongRsp)LongRsp 0 (Interrupt)Interrupt 0 (Pending)Pending 0 (Enable)Enable 0RESERVED

Description

Command register.

Fields

CmdIndex

Command index.
Response

If set, CPSM waits for a response.
LongRsp

If set, CPSM receives a 136 bit long response.
Interrupt

If set, CPSM disables command timer and waits for interrupt request.
Pending

If set, CPSM waits for CmdPend before it starts sending a command.
Enable

If set, CPSM is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data